Why Your Next Embedded CPU Should Provide Hardware Support for Multitasking and Multiple Virtual Machines

David S. Hardin

Abstract

The ample transistor budgets of modern silicon fabrication present CPU designers with a number of options as to how best to spend their budgets. Increasingly, silicon real estate is being devoted to "bookkeeping" functions associated with multiple issue, speculative execution, and/or out-of-order execution of legacy instruction sets. This has resulted in improved average case single-threaded execution speed, but at the expense of determinism, power consumption, context switch time, etc. Another design alternative is to devote silicon resources to directly support current software development practice, such as multithreading, compilation to virtual machine code, object-oriented method dispatch and field access, safe mobile code execution, etc. In this talk, we will describe one such CPU design, the aJile Systems aJ-100, and show how it efficiently supports modern software engineering practice, including hardware support for objects, threads, and Java bytecode execution, as well as multiple processes brickwalled in space and time. We will particularly demonstrate how such an architecture provides advantages for the Ada95 developer, through the use of JGNAT from ACT.